1. Field of the Invention
The present invention is related to a semiconductor integrated circuit.
2. Description of the Related Art
Generally, semiconductor integrated circuits are known that achieve lower power, power saving, compactness and high speed (see for example Japanese Patent Application Laid-Open (JP-A) No. 20020-124637).
The semiconductor integrated circuit described in JP-A No. 2002-124637 includes a constant current circuit section and a start-up circuit section. The constant current circuit section has two operation points, the respective operation points being as set out below.    (1) I1=I2=oA (potential of node N1 is power source voltage VDD, potential of node N2 is earth contact voltage GND)    (2) When the transconductance gm of the transistors M1, M2, M3 and M4 are respectively gm1, gm2, gm3, and gm4I1=k*T/q*{ln(gm1*gm2/gm3*gm4)}I2=gm2/gm1*I1wherein:    k is the Boltzmann constant    T is the absolute temperature, and    q is the charge of an electron.    *: represents a multiplication sign.
On start-up it is necessary to flow current in the constant current circuit and to raise the current flow up to the current values I1 and I2 of the operation point as shown in equation (2).
As shown in FIG. 3, the start-up circuit section of the semiconductor integrated circuit described in JP-A No. 2002-124637 is configured including M5 (a P channel MOS transistor), M6 (a P channel MOS transistor), and C1 (a capacitance element). When the power source VDD is started up, the initial state is the state of the operation point as shown in equation (1), with the potential of node N1 the power source voltage VDD level. Therefore M6 is not on and C1 is not charged. Therefore, since the charge of C1 is zero, the potential of node N3 is substantially that of earth contact voltage GND. M5 is therefore on and current flows into M4 (an N channel MOS transistor). Due to this, current flows into current mirror forming M3 (an N channel MOS transistor) and M1 (a P channel MOS transistor), and current flows into M6 which becomes the current mirror of M1. Node N3 is then charged up to the power source voltage VDD level. M5 is then off, and the constant current circuit stabilizes at the operation point as shown in the equation (2).
In this circuit configuration, the start-up circuit does not switch off as long as current does not flow out to the self bias circuit. The constant current circuit therefore is stabilized at the operation point shown in equation (2) independently of the speed of power rising.
However, in the semiconductor integrated circuit described in JP-A No. 2002-124637, in a constant current circuit capable of low voltage operation transistors of low threshold value Vt (for example 0.1V) are often used for M1, M2, M3, M4. In such cases, since the M6 used in the start-up circuit is a current mirror of M1 (namely since M6 is configured as a current mirror circuit to M1) a transistor with the same low threshold value Vt to that of M1 is used for M6. Generally the lower the threshold value Vt the higher the off-leak current in transistors. The off-leak current also gets greater when the temperature gets higher. Therefore, when a low threshold value Vt is used and power voltage rise is slow, node N3 is charged by off-leak current of M6 before the constant current circuit is in operation (before the potential of node N1 reaches the power source voltage VDD level), and the potential of node N3 reaches the power source voltage VDD level. The M5 supplying the start-up current to the constant current circuit is consequently always in the non-conducting state, and current cannot then be supplied to the constant current circuit. This means that the constant current circuit cannot be started up.